1. Field of the Invention
The present invention relates to an Input/Output (I/O) regulating circuitry. More particularly, the present invention relates to an I/O regulating circuitry without an ESD device and with self-electrostatic-discharge protection.
2. Descriptions of the Related Art
Generally, to prevent electrostatic discharge damage, an ESD device is designed for connection to an I/O chip pad. When electrostatic discharge occurs, the ESD device absorbs the electrostatic discharge energy to protect the circuitries of the chip.
However, as the critical dimensions of CMOS process shrink, the ESD device has a poor breakdown voltage; that is, the junction breakdown voltage decreases. Therefore, the significant voltage variation of the internal circuitries of the chip may damage the ESD device over time and result in an IC chip failure. For example, in multi-level cell (MLC) technology, the voltage variation of its significant equivalent load would result in a significant energy change. The changed energy then has a great possibility of damaging the ESD device.
Consequently, it is important to effectively protect the chip under significant voltage variations and saving the equivalent ESD area in CMOS processes with a minimized critical dimension.